# The data-bus width of a 204 x 8 bits is

1.  8

2.  10

3.  12

4.  16

4

8

Explanation :
No Explanation available for this question

# Four memory clips of 16 x 4 have their address bases connected together. The system will be of size

1.  64 x 64

2.  16 x 16

3.  32 x 8

4.  256 x 1

4

16 x 16

Explanation :
No Explanation available for this question

# In the program below, the numbers of times the first and second Jnz instructions cause the control to be transferred to loop are respectively

1.  5 and 2

2.  4 and 1

3.  259 and 1

4.  260 and 1

4

259 and 1

Explanation :
No Explanation available for this question

# single instruction to clear the lower four bits of the accumulator in 8085 assembly language is

1.  XRI 0HF

2.  ANI F0H

3.  XRI F0H

4.  ANI 0FH

4

ANI F0H

Explanation :
No Explanation available for this question

# Assume that the OP-AMP in the figure, ideal a. Obtain an expression for V0 in terms of Vs, R, and the reverse saturation current Is of the transistor b. If R=1Ω, Is=1pA and the thermal voltage VT-25mV, then what is the value of the output voltage V0 for an input voltage Vs=1V c. Suppose that the transistor in the feedback path is replaced by a p-n junction diode with a reverse saturation current of Is, the p-side of the diode is connected to node A and the n-side to node B. Then what is the expression for V0 in terms Vs R and Is

1.   VTln(IsR/Vs)

2.  -0.69V

3.   VTln(IsR/Vs)

3

VTln(IsR/Vs)

Explanation :
No Explanation available for this question

# Which of the following statements is true

1.  ROM is a Read/ Write memory

2.  PC points to the last instruction that was executed

3.  Stack works on the principle of LIFO

4.  All instructions affect the flage.

4

Stack works on the principle of LIFO

Explanation :
No Explanation available for this question

# A computer system has a 4 K word cache organized in blockset associative manner with – blocks per set, 64 words per block. The number of bits in the SET and WORD fields of the main memory address formula is

1.  15, 4

2.  6, 4

3.  7, 2

4.  4, 6

4

4, 6

Explanation :
No Explanation available for this question

# In a 80-85 microprocessor system with memory mapped I/O

1.  I/O devices have 8 – bit addresses

2.   I/O devices are accessed using In and OUT instructions

3.  There can be a maximum of 356 input devices and 256 output devices

4.  Arithmetic and logic operations can be directly performed with the I/O data

4

Arithmetic and logic operations can be directly performed with the I/O data

Explanation :
No Explanation available for this question

# The Oscillator circuit shown in the figure is

1.  Hartley Oscillator with foscillation=79.6 MHz

2.  Colpitts Oscillator with foscillation=50.3 MHz

3.   Hartley Oscillator with foscillation=159.2 MHz

4.  Colpitts Oscillator with foscillation=159.2 MHz

4

Colpitts Oscillator with foscillation=50.3 MHz

Explanation :
No Explanation available for this question

1.  2050, 0FFC

2.  2251 0FFC

3.  1025, 0CCF

4.  1025, 0CCF

4