# The OP-amp circuit shown in the figure is a filter. The type of filter and its cut-off frequency are respectively

4

Explanation :
No Explanation available for this question

# In an ideal differential amplifier shown in the figure, a large value of (RE).

1.  increases both the differential and common-mode gains

2.  increases the common-mode gain only.

3.  decreases the differential-mode gain only.

4.  decreases the common-mode gain only.

4

decreases the common-mode gain only.

Explanation :
No Explanation available for this question

# For  an  n-channel  MOSFET  and  its  transfer  curve  shown  in  the  figure,  the  threshold voltage is

1.  1 V and the device is in active region.

2.  -1 V and the device is in saturation region.

3.   1 V and the device is in saturation region.

4.  -1 V and the device is in active region

4

1 V and the device is in active region.

Explanation :
No Explanation available for this question

# The  circuit  using  a  BJT  with β  =  50  and VBE  =  0.7  V  is  shown  in  the  figure.  The  base current IB and collector voltage VC are respectively

1.  43 µA and 11.4 Volts.

2.  40 µA and 16 Volts.

3.  45 µA and 11 Volts

4.  50 µA and 10 Volts.

4

40 µA and 16 Volts.

Explanation :
No Explanation available for this question

# The zener diode in the regulator circuit shown in the figure has a Zener voltage of 5.8 voltsand a Zener knee current of 0.5 mA. The maximum  load  current drawn  from  this  circuit ensuring proper functioning over the input voltage range between 20 and 30 volts, is

1.  23.7 mA

2.  14.2 mA.

3.  13.7 mA.

4.  24.2 mA.

4

24.2 mA.

Explanation :
No Explanation available for this question

# The transistors used in a portion of the TTL gate shown in the figure have aβ = 100. The base-emitter voltage of is of 0.7V for a transistor in active region and 0.75V for a transistor in saturation. If the sink current I = 1 mA and the output is at logic 0, then the current IR will be equal

1.  0.65 mA

2.  0.70 mA.

3.  0.75 mA.

4.   1.00 mA

4

0.75 mA.

Explanation :
No Explanation available for this question

# The Boolean expression for the truth table shown is A B C D 0 0 0 0 0 0 1 0 0 1 0 0 0 1 1 1 1 0 0 0 1 0 1 0 1 1 0 1 1 1 1 0

1.

2.

3.

4.

4

Explanation :
No Explanation available for this question

# Both  transistors T1 and T2 shown  in  the  figure, have a  threshold voltage of 1 Volts. The device parameters K1 and K2 of T1 and T2 are, respectively, 36 µA/V2 and 9 µA/V2. The output voltage V0 is

1.  1 V

2.  2 V

3.  3 V

4.  4 V

4

4 V

Explanation :
No Explanation available for this question

# The present output Qn of an edge triggered JK flip-flop is logic 0. If J = 1, then Qn + 1

1.  cannot be determined

2.  will be logic 0

3.  will be logic 1

4.  will race around

4

will be logic 1

Explanation :
No Explanation available for this question

1.  010

2.  100

3.  111

4.  101

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