# The figure given below shows the circuit of which one of the following is

1.  Bi-stable multi-vibrator

2.  Schmitt trigger

3.  Mono-stable multi-vibrator

4.  Astable multi-vibrator

4

Mono-stable multi-vibrator

Explanation :
No Explanation available for this question

# The black box in the figure below, consists of a minimum complexity circuit that uses only AND, OR and NOT gates The function f(x, y, z) = 1 whenever x, y are different and 0 otherwise. In addition the 3 inputs x, y, z are never all the same value. Which one of the following equations leads to the correct design for the minimum complexity circuit

1.  x’y+xy’

2.  x+yz’

3.  x’y’z+xy’z

4.  xy+y’z+z’

4

x’y+xy’

Explanation :
No Explanation available for this question

# The state transition diagram for the logic circuit shown is

1.

2.

3.

4.

4

Explanation :
No Explanation available for this question

# For the circuit shown in the figure below, what is the frequency of the output Q

1.  Twice the input clock frequency

2.  Half the input clock frequency

3.  Same as the input clock frequency

4.  Inverse of the propagation delay of the FF

4

Half the input clock frequency

Explanation :
No Explanation available for this question

# An 8085 microprocessor based system uses a 4k x 8bit RAM whose starting address is AAOO H. The Address of Last byte in this RAM is

1.   0FFF H

2.  1000 H

3.  B9FF H

4.  BA00 H

4

B9FF H

Explanation :
No Explanation available for this question

# The circuit shown below is to be used to implement the function Z=f(A, B) = +B   What value is to be selected for I and J?

1.  I=0, J=B

2.  I=A, J=B

3.  I=B, J=1

4.  I=, J=0

4

I=B, J=1

Explanation :
No Explanation available for this question

# Which one of the following logic operations is performed by the digital circuit shown below

1.  NOR

2.  NAND

3.  X-OR

4.  OR

4

X-OR

Explanation :
No Explanation available for this question

# In the circuit given below, both transistors have the same VT. What is the approximate value of the highest possible output voltage Vout, if Vin can range from 0 to VDD (Assume 0

1.  VDD-VT

2.  VDD

3.  VT

4.  0

4

VDD-VT

Explanation :
No Explanation available for this question

# In figure, the Boolean expression for the output in terms of inputs A, B and C when the clock ‘ck’ is high, is given by___

1.  c(A+B)

2.  c(A-B)

3.  c(B-A)

4.  c(B+A)

4

c(A+B)

Explanation :
No Explanation available for this question

# Consider the following statements: A 4:16 decoder can be constructed (with enable input) by 1. Using four 2:4 decoders (each with an enable input) only 2. Using five 2:4 decoders (each with an enable input) only 3. Using two 3:8 decoders (each with an enable input) only 4. Using two 3:8 decoders (each with an enable input) and an inverter

1.  2 and 3

2.  1 only

3.  2 and 4

4.  None of these

4