# In the CMOS circuit shown, electron and hole mobilites are equal and M1 and M2 are equally sized. The device M1 is in the linear region if

1.   Vin

2.   1.875V

3.  Vin>3.125V

4.  0

4

Vin<1.875V

Explanation :
No Explanation available for this question

# The source of a silicon (ni=1010 per cm3)n-channel MOS transistor has and area of 1 sq μm and a depth of 1 μm. If the dopant density in the source is 1019/cm3, the number of holes in the source region with the above volume is approximately

1.  107

2.  100

3.  10

4.   0

4

0

Explanation :
No Explanation available for this question

# The source-body junction capacitance is approximately

1.   2 fF

2.  7 fF

3.  2 pF

4.  7 pF

4

7 fF

Explanation :
No Explanation available for this question

# The gate –source overlap capacitance is approximately

1.   0.7 fF

2.   0.7 pF

3.  0.35 fF

4.   0.24 pF

4

0.7 fF

Explanation :
No Explanation available for this question

# The small-signal resistance (i.e, dVB) in kΩ offered by the n-channel MOSFET M shown in the figure below, at a bias point of VB=2V is (device data for M: device transconductance parameter kN=μnCox(W/L)=40μA/V2, threshold voltage VTN=1 V, and (neglect body effect and channel length modulation effects)

1.  12.5

2.  25

3.   50

4.  100

4

25

Explanation :
No Explanation available for this question

# The small-signal resistance (i.e, dVB) in kΩ offered by the n-channel MOSFET M shown in the figure below, at a bias point of VB=2V is (device data for M: device transconductance parameter kN=μnCox(W/L)=40μA/V2, threshold voltage VTN=1 V, and (neglect body effect and channel length modulation effects)

1.  12.5

2.  25

3.   50

4.  100

4

25

Explanation :
No Explanation available for this question

# The bias current IDC through the diodes is

1.   1 mA

2.  1.28 mA

3.  1.5 mA

4.  2 mA

4

1 mA

Explanation :
No Explanation available for this question

# The diodes and capacitors in the circuit shown are ideal. The voltage v(t) across the diode D1 is

1.   cos (ωt)-1

2.  sin (ωt)

3.  1-cos(ωt)

4.   1-sin(ωt)

4

cos (ωt)-1

Explanation :
No Explanation available for this question

# The i-v characteristics of the diode in the circuit given below are i={(v-0.7/500)A, v≥0.7 V       0A, v

1.   10 mA

2.  9.3 mA

3.  6.67 mA

4.  6.2 mA

4

6.2 mA

Explanation :
No Explanation available for this question

# The transistor shunt regulator shown in the figure has a regulated output voltage of 10V. The input varies from 20V to 30V. The relevant parameters for Zener diode and the ytansistor are Vz=9.5V, VBE=0.3V, β=99 Neglect the current through RB. Then the maximum power dissipated in the maximum power dissipated in the Zener diode (PZ) and the transistor (PT) are

1.   PZ=75 mW, PT=7.9W

2.   PZ=85 mW, PT=8.9W

3.  PZ=95 mW, PT=9.9W

4.  PZ=115 mW, PT=11.9W

4