# A heavily doped n-type semiconductor has the following data Hole-electron mobility ratio : 0.4 Doping concentration : 4.2 x 108 atoms/m3 Intrinsic concentration : 1.5 x 104 atoms/m3 The ratio of conductance of the n-type semiconductor to that of the intrinsic semiconductor of same material and at the same temperature is given by

1.  0.00005

2.  2,000

3.  10,000

4.  20,000

4

20,000

Explanation :
No Explanation available for this question

# For the circuit shown in the following figure, the capacitor C is initially uncharged. At t = 0, 10,000 switch S is closed. The voltage VC across the capacitor at t = 1 millisecond is In  the  figure shown above,  the OP AMP  is supplied with ± 15V and  the ground has been shown by the symbol

1.  0 Volts

2.  6.3 Volts

3.  9.45 Volts

4.  10 Volts

4

10 Volts

Explanation :
No Explanation available for this question

# For  the  circuit  shown  below,  assume  that  the  zener  diode  is  ideal  with  a  breakdown voltage of 6 Volts. The waveform observed across R is

1.

2.

3.

4.

4

Explanation :
No Explanation available for this question

# A new Binary Coded Pentary  (BCP) number system  is proposed  in which every digit of abase-5  number  is  represented  by  tis  corresponding  3-bit  binary  code. For  example,  the base-5  number  is  represented  by  tis  corresponding  3-bit  binary  code. For  example,  the base-5 number 24 will be represented by its BCP code 010100. In this numbering system, the BCP code 100010011001 corresponds to the following number in base-5 system

1.  423

2.  1324

3.  2201

4.  4231

4

4231

Explanation :
No Explanation available for this question

# An  I/O    peripheral  device  shown  in  Figure  (b)  below  is  to  be  interfaced  to  an  8085 microprocessor. To select the I/O device in the address range D4 H - D7 H, its chip-select ( ) should be connected to the output of the decoder shown in Figure (a) below

1.  output 7

2.  output 5

3.  output 2

4.  output 0

4

output 5

Explanation :
No Explanation available for this question

# For  the circuit shown  in  figure below,  two 4-bit parallel-in serial-out shift  registers  loaded with the data shown are used to feed the data to a full adder. Initially, all the flip-flops are in clear state. After applying two clock pulses, the outputs of the full adder should be

1.  S = 0, C0 = 0

2.  S = 0, C0 = 1

3.  S = 1, C0 = 0

4.  S = 1, C0 = 1

4

S = 1, C0 = 1

Explanation :
No Explanation available for this question

# A  4-bit D/A  converter  is  connected  to  a  free-running  3-bit UP  counter,  as  shown  in  the following figure. Which of the following waveforms will be observed at Vo In the figure shown above, the ground has been shown by the symbol

1.

2.

3.

4.

4

Explanation :
No Explanation available for this question

# Two  D-flip-flops,  as  shown  below,  are  to  be  connected  as  a  synchronous  counter  that goes through the following Q1Q0 sequence 00 → 01 → 11 → 10 → 00 → ….. The inputs D0 and D1 respectively should be connected as

1.

2.

3.

4.

4

Explanation :
No Explanation available for this question

# Following is the segment of a 8085 assembly language program LXI SP, EFFFH CALL 3000 H             :             : 3000 H : LXI H, 3CF4 H PUSH PSW SPHL POP PSW RET On completion of RET execution, the contents of SP is

1.  3CFO H

2.  3CF8 H

3.  EFFD H

4.  EFFF H

4

3CF8 H

Explanation :
No Explanation available for this question

1.  2 x 103

2.  4 x 103

3.  6 x 103

4.  8 x 103

4