1. Both A and R are true and R is the correct explanation of A
2. Both A and R are true but R is NOT a correct explanation of A
3. A is true but R is false
4. A is false but R is true.
Both A and R are true and R is the correct explanation of A
1. 1,2 and 3
2. 1 and 2
3. 2 and 3
4. 1 and 3
1 and 2
1. A B C D 4 3 2 1
2. A B C D 4 1 2 3
3. A B C D 3 1 4 2
4. A B C D 3 4 1 2
|
A |
B |
C |
D |
|
4 |
3 |
2 |
1 |
1. gain bandwidth product
2. (propagation delay time) * (power dissipation)
3. (fan-out) * (propagation delay time)
4. (noise margin) * (power dissipation)
(fan-out) * (propagation delay time)
1. Both A and R are true and R is the correct explanation of A
2. Both A and R are true but R is NOT a correct explanation of A
3. A is true but R is false
4. A is false but R is true.
A is false but R is true.
1. 8 half-adders, 4-OR gates
2. 8 half-adders, 3-OR gates
3. 7 half-adders, 4-OR gates
4. 7 half-adders, 3-OR gates
8 half-adders, 3-OR gates
1. Both A and R are true and R is the correct explanation of A
2. Both A and R are true but R is NOT a correct explanation of A
3. A is true but R is false
4. A is false but R is true.
Both A and R are true but R is NOT a correct explanation of A
1. Three input majority
2. Three bit parity checker
3. Three bit comparator
4. Three bit counter
Three bit counter
1. Both A and R are true and R is the correct explanation of A
2. Both A and R are true but R is NOT a correct explanation of A
3. A is true but R is false
4. A is false but R is true.
Both A and R are true but R is NOT a correct explanation of A
1. NAND-NOR realization
2. NOR-NOR realization
3. NOR-NAND realization
4. NAND-NAND realization
NAND-NOR realization