1. can be triggered only once
2. has two quasi-stable states
3. cannot be triggered until full pulse has been
4. is capable of being triggered while the outputs being
5. 44
6. 62
7. 80
8. 86
80
No Explanation available for this question
1. vertical blanking period
2. horizontal blanking
3. serrations
4. horizontal retrace
5. 1
6. 2
7. 3
8. 4
9. 5
2
No Explanation available for this question
1. 1, 2 and 3
2. 1, 3 and 4
3. 1, 2 and 4
4. 2, 3 and 4
1, 2 and 4
No Explanation available for this question
1.
2.
3.
4.
No Explanation available for this question
1. I1+ I2 + I3
2.
3.
4.
No Explanation available for this question
1. Shift registers
2. Counters
3. A/D converters
4. Combinational circuits
Shift registers
No Explanation available for this question
1. A B C 3 2 1
2. A B C 3 1 2
3. A B C 2 4 1
4. A B C 4 2 3
|
A |
B |
C |
|
3 |
2 |
1 |
No Explanation available for this question
1. number of digits used in coding
2. volume of information it can take
3. maximum rate of information transmitted
4. bandwidth required for information
maximum rate of information transmitted
No Explanation available for this question
1. A B C 2 1 3
2. A B C 2 3 4
3. A B C 1 2 3
4. A B C 3 1 1
|
A |
B |
C |
|
2 |
1 |
3 |
No Explanation available for this question
1. X0X1X2……Xn + X1 X2….Xn + X2 X3….Xn……Xn
2. X0X1 + X2 X3 +….Xn-1. Xn
3. X0 + X1 + X2 +…..+Xn
4. X0X1X2…… Xn-1 + X2 X3 X5…… Xn-1 +… Xn-2 Xn-1 +Xn
X0X1X2…… Xn-1 + X2 X3 X5…… Xn-1 +… Xn-2 Xn-1 +Xn
No Explanation available for this question