# The initial contents of the \$-bit serial-in- parallel-out,right-shift,Shift.Register shown in given figure is 0110.After three clock pulses are applied,the contents of  the shift register will be

1.  0000

2.  0101

3.  1010

4.  1111

4

1010

Explanation :
No Explanation available for this question

# In an 8085 microprocessor system with memory mapped I/O,

1.  I/O devices have 16-bit addresses

2.  I/O devices are accessed using IN and OUT instructions

3.  there can be a maximum of 256 input devices and 256 output devices

4.  arithmetic and logic operations can be directly performed with the I/O data.

4

arithmetic and logic operations can be directly performed with the I/O data.

Explanation :
No Explanation available for this question

# Dual-slope integration type Analog-to-digital converters provide

1.  higher speeds compared to all other types of  A/D converters

2.  very good accuracy without putting extreme requirements on component stability

3.  good rejection of power supply hum

4.  better resolution compared to all other types of A/D converters for the same number of bits

4

good rejection of power supply hum

Explanation :
No Explanation available for this question

# which of the following signals is/are periodic

1.  S(t) = cos 2t+cos 3t+cos 5t

2.  S(t)=exp(j8πt)

3.  S(t)=exp(-7t)sin 10 πt

4.   S(t) = cos 2tcos 4t

4

S(t)=exp(j8πt)

Explanation :
No Explanation available for this question

# If G(t) represents the Fourier transform of a signal g(t) which is real and odd symmetric in   time,then

1.  G(f) is complex

2.  G(f) is imaginary

3.  G(f) is real

4.  G(f) is real and non-negative

4

G(f) is imaginary

Explanation :
No Explanation available for this question

# The maximum power efficiency of an AM modulator is

1.  25%

2.  50%

3.  75%

4.  100%

4

50\%

Explanation :
No Explanation available for this question

# For a random variable x following the probability density function.p(x),shown in given figure the mean and the variance are respectively

1.  ½ and 2/3

2.  1 and 4/3

3.  1 and 2/3

4.  1 and 4/3

4

1 and 4/3

Explanation :
No Explanation available for this question

# The bit stream 01001 is  differentially encoded using ‘Delay and Ex OR’scheme for DPSK   transmission. Assuming the reference bit as a ‘1’ and assigning phases of ‘0’and π for 1’s and 0’s respectively,in the encoded sequence,the transmitted phase sequence becomes

1.  π0 π π0

2.  0 π π00

3.  0 π π π0

4.  π π0 π π

4

π π0 π π

Explanation :
No Explanation available for this question

# Coherent demodulation of FSK signal can be effected using

2.  bandpass filters and envelope detectors

3.  matched filter

4.  discriminator detection

4

matched filter

Explanation :
No Explanation available for this question

# Source encoding in a data communication system is done is order to

1.  enhance the information transmission rate

2.  reduce the transmission errors

3.  conserve the transmitted power

4.  facilitate clock recovery in the receiver

4