# The skin depth at 10 MHz for a conductor is 1 cm. The phase velocity of an electromagnetic wave in  the conductor at 1,000 MHz is about

1.  6x106m/sec

2.  6x107m/sec

3.  3x106m/sec

4.  6x108m/sec

4

6x108m/sec

Explanation :
No Explanation available for this question

# The output voltage V,of the circuit shown in the  figure is

1.  -4V

2.  5 V

3.  5 V

4.  -5.5 V

4

-4V

Explanation :
No Explanation available for this question

# The decoding circuit shown in the figure is has been used to generate the active low chip select signal for a microprocessor peripheral. (The address lines are designated as AO to A7 for I/O addresses) The pheriperal will correspond to I/O addresses

1.  60H to 63H

2.  A4 to A 7H

3.  30H to 33H

4.  70H to 73H

4

A4 to A 7H

Explanation :
No Explanation available for this question

# The following insturctions have been executed by an 8085 μP           ADDRESS(HKX)                  INSTRUCTION                  6010                                 LX1 H,8A79H                 6013                                  MOVA,L                 6015                                     ADDH                6016                                    DAA                6017                                   MOV H, A                6018                                     PCHL from which address will the next instruction be fetched

1.  6019

2.  6379

3.  6979

4.  None of the above

4

6979

Explanation :
No Explanation available for this question

# Signed integer Ins been stored in a byte using the 2's complement formal. We wish to store the same integer in a 16 bit word. We should

1.  copy the originalbyte to the less significant byte of the word and fill the more significant withzeros

2.  copy the original byte to the more significant byte of the word and fill the less significant byte with  zeros

3.  copy the original byte to the less significant byte of the word and make each fit of the moreSignificant byte equal to the most significant bit of the original byte

4.  copy the original byte lo the loss significant byte as well as the more significant byte of the word

4

copy the original byte to the more significant byte of the word and fill the less significant byte with  zeros

Explanation :
No Explanation available for this question

# A half wave rectifier uses a diode with a forward resistance Rf. The voltage is Vm sin ωt and the loadresistance is R.The DC current is given by

1.  Vm/√2RL

2.  Vm/π(Rf+RL )

3.  2Vm/√π

4.  Vm/RL

4

2Vm/√π

Explanation :
No Explanation available for this question

# The intrinsic carrier density at 300 K is 1.5 x 1010/ cm3, in silicon. For n-type silicon doped to2.25 x 1015 atoms/cm3, the equilibrium electron and hole densities are

1.  n = 1.5 x 1015 /cm3 p = 1.5 x 1010/cm3

2.  n = 1.5x 1010 /cm3,p = 2.25 x 1015/cm3

3.  n = 2.25x 1015 /cm3,p = 1.0 x 105/cm3

4.  n = 1.5x 1010 /cm3,p = 1.5 x 1010/cm3

4

n = 2.25x 1015 /cm3,p = 1.0 x 105/cm3

Explanation :
No Explanation available for this question

# For the NMOS logic gate shown in the figure is the logic function implemented is

1.

2.

3.

4.

4

Explanation :
No Explanation available for this question

# In a J - K flip-flip we have J = Q and K=1. Assuming the flip flop was initially cleared and then clocked for 6 puleses, the sequence at the Q output will be

1.  010000

2.  011001

3.  010010

4.  010101

4

011001

Explanation :
No Explanation available for this question

# The gate delay of an NMOS inverter is dominated by charge time rather than discharge time because

1.  the driver transistor has larger threshold voltage than the load transistor

2.  the driver transistor has larger leakage currents compared to the load transistor

3.  the load transistor has a smaller W/L ratio compared to the driver transistor

4.  none of the above

4