Consider following set of instructions: MVI A,BYTE1 RLC MOV B,A RLC RLC ADD B If BYTE1= 07H, then content of A, after the execution of program will be

1.  46H

2.  70H

3.  38H

4.  68H

View Answer  
4
Correct Answer :

46H


Explanation :
No Explanation available for this question

Consider the following program MVI A,BYTE1 RRC RRC If BYTE1=32H, then contents of A after execution of program will be

1.  08H

2.  8CH

3.  12H

4.  None of these

View Answer  
4
Correct Answer :

8CH


Explanation :
No Explanation available for this question

The contents of some memory location of an 8085 μp based system are shown: Address (Hex) contents (Hex) 3000 02 3001 30 3002 00 3003 30 The program is as follows LHLD 3000H MOV E, M INX H MOV D, M LDAX D MOV L, A INX D LDAX D MOV H, A The contents if HL pair after the execution of the program will be

1.  0030H

2.  3000H

3.  3002H

4.  0230H

View Answer  
4
Correct Answer :

3002H


Explanation :
No Explanation available for this question

Consider following set of 8085 instruction: MVI A,DATA1 ORA A JP DSPLY XRA A DSPLY:OUT: PORTI HLT If DATA1=92H, then output at PORT1 is

1.  00

2.  FFH

3.  92H

4.  None of these

View Answer  
4
Correct Answer :

00


Explanation :
No Explanation available for this question

The switching speed of ECL is very high, because the transistors

1.  Are switched between cut-off and saturation regions.

2.  And switched between active and saturation regions

3.  And switched between active and cut-off regions

4.  May operate in any of three regions.

View Answer  
4
Correct Answer :

And switched between active and cut-off regions


Explanation :
No Explanation available for this question

In standard TTL, ‘totem pole’ stage refers to

1.  Multi-emitter

2.  Phase-splitter

3.  Output buffer

4.  Open collector output stage.

View Answer  
4
Correct Answer :

Output buffer


Explanation :
No Explanation available for this question

Data can be changed from spatial code to temporal code and vice-versa by using

1.  ADCs and DACs

2.  Shift registers

3.  Synchronous counter

4.  Timers.

View Answer  
4
Correct Answer :

ADCs and DACs


Explanation :
No Explanation available for this question

In the given figure, the LED.

1.  Emits light when both S1 and S2

2.  Emits light when both S1 and S2 are open

3.  Emits light when both S1 and S2 are closed

4.  Does not emit light irrespective of the positions.

View Answer  
4
Correct Answer :

Does not emit light irrespective of the positions.


Explanation :
No Explanation available for this question

For the logic circuit shown in the figure, output y is given by

1.  A.B

2.  

3.  

4.  

View Answer  
4
Correct Answer :


Explanation :
No Explanation available for this question

To realise given truth table from the circuit shown in the figure, the input to J in terms of and B would have to be A B Qn+1 J 0 0 Qn 0 0 1 1 1 1 0 Qn 0 1 1 0 x

1.  

2.  

3.  B

4.  AB.

View Answer  
4
Correct Answer :

B


Explanation :
No Explanation available for this question
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