For a MOD-12counter, FF has a tpd=60ns.NAND gate has a tpd of 25ns. The clock frequency is

1.  =3.774 MHz

2.  >3.774 MHz

3.  

4.  =4.167 MHz

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4
Correct Answer :

=3.774 MHz


Explanation :
No Explanation available for this question

A sample-and-hold(S/H) circuit, having a holding capacitor of 0.1nf, is used at the input of an ADC (analog-to-digital converter).The conversion time of the ADC is 1 μsec, and during this time, the capacitor should not lose more than 0.5% of the charge put across it during the sampling time. The maximum value of the input signal to the S/H circuit is 5V. the leakage current of the S/H circuit should be less than

1.  2.5mA

2.  0.25mA

3.  25.0μA

4.  2.5μA

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4
Correct Answer :

2.5μA


Explanation :
No Explanation available for this question

The circuit of given figure shows a 555 timer IC connected as an a stable multi vibrator. The value of the capacitor C is 10 nF. The values of the resistors RA and RB for a frequency of 10 kHz and a duty cycle of 0.75 for the output voltage waveform are

1.  RA=3.62kΩ, RB=3.62kΩ

2.  RA=3.62kΩ, RB=7.25kΩ

3.  RA=7.25kΩ, RB=3.62kΩ

4.  RA=7.25kΩ, RB=7.25kΩ

View Answer  
4
Correct Answer :

RA=7.25kΩ, RB=3.62kΩ


Explanation :
No Explanation available for this question

Among the following, the slowest ADC (analog-to-digital converter is)

1.  Parallel-comparator(i.e., flash) type

2.  Successive approximation type

3.  Integrating type

4.  Counting type.

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4
Correct Answer :

Successive approximation type


Explanation :
No Explanation available for this question

A 10 bit A/D converter is used to digitize an analog signal in the 0 to 5v range. The maximum peak to peak ripple voltage that can be allowed in the d.c. supply voltage is

1.  Nearly 100 mV

2.  Nearly 50 mV

3.  Nearly 25 mV

4.  Nearly 5.0 mV.

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4
Correct Answer :

Nearly 5.0 mV.


Explanation :
No Explanation available for this question

The number of comparators in a parallel conversion type 8-bit A to D converter is

1.  8

2.  16

3.  255

4.  256.

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4
Correct Answer :

255


Explanation :
No Explanation available for this question

A 3-bit weighted resistor DAC shown in the figure has VR=2V and R1/R=2. For an input of 100, the output will be

1.  -2V

2.  -4V

3.  2V

4.  4V.

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4
Correct Answer :

-4V


Explanation :
No Explanation available for this question

Current I through resistance r in the circuit shown below, is

1.  

2.  

3.  

4.  

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4
Correct Answer :


Explanation :
No Explanation available for this question

An analog voltage is in the range of 0 to 8V is divided in eight intervals for conversion to 3-bit digital output. The maximum quantization errors

1.  0V

2.  0.5V

3.  1V

4.  2V.

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4
Correct Answer :

1V


Explanation :
No Explanation available for this question

If resolution of a D/A convertor is approximately 0.4% of its full-scale range. Then it is a/an

1.  8-bit convertor

2.  10-bit convertor

3.  12-bit convertor

4.  16-bit convertor.

View Answer  
4
Correct Answer :

8-bit convertor


Explanation :
No Explanation available for this question
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