# Complement of the Boolean expression is

1.

2.

3.

4.

4

Explanation :
No Explanation available for this question

# The logic function is the same as

1.

2.

3.

4.  None of these.

4

Explanation :
No Explanation available for this question

# The minimal product-of-sums function described by the k-map given in the figure is, Ø don’t care

1.  AC’

2.  A’+C’

3.  A+C

4.  AC

4

AC’

Explanation :
No Explanation available for this question

# In the circuit shown in figure, value of input p goes from 0à 1 and that goes from 1à0.which output forms shown in figure represents the output under a static hazard conditions

1.

2.

3.

4.

4

Explanation :
No Explanation available for this question

# The maximized expression for the given K-map is(X: don’t care)

1.

2.

3.

4.

4

Explanation :
No Explanation available for this question

# The circuit of the gate in the resistor transistor logic(RTL) family shown in the given figure is a/an

1.  AND gate

2.  OR gate

3.  NAND gate

4.  NOR gate.

4

NAND gate

Explanation :
No Explanation available for this question

# K-map for a Boolean function is shown in the figure. The function would be

1.

2.

3.

4.  None of these.

4

Explanation :
No Explanation available for this question

# The circuit shown in the figure converts

1.  BCD to binary code

2.  Binary to excess

3.  Excess 3 to Gray code

4.  Gray to Binary code.

4

Gray to Binary code.

Explanation :
No Explanation available for this question

# The switching circuit given in the figure can be expressed in binary logic notation as

1.  L=(A+B)(C+D)E

2.  L=AB+CD+E

3.  L=E+(A+B)(C+D)

4.  L = (AB+CD)E.

4

L=(A+B)(C+D)E

Explanation :
No Explanation available for this question

1.  OR gate

2.  AND gate

3.  NOR gate

4.  NAND gate.

4