# Assuming that only X and Y logic inputs are available and their complements and are not available, then what is the minimum number of two-input NAND gates require to implement X ⊕ Y

1.  2

2.  3

3.  4

4.  5

4

5

Explanation :
No Explanation available for this question

# For the identity the dual form is

1.

2.

3.

4.

4

Explanation :
No Explanation available for this question

# Min terms corresponding to decimal number 15 is

1.  ABCD

2.

3.  A+B+C+D

4.

4

ABCD

Explanation :
No Explanation available for this question

# Minimized expression for the k-map shown below is

1.

2.

3.

4.

4

Explanation :
No Explanation available for this question

# The dual of the Boolean theorem A.(B+C)=A.B+A.C is

1.  A+(B+C)=A.B+A.C

2.  A.(B+C)=(A+B)(A+C)

3.  A+B.C=(A+B)(A+C)

4.  None of these.

4

A+B.C=(A+B)(A+C)

Explanation :
No Explanation available for this question

# The output of a logic gate is ‘1’ when all its input are at logic ‘0’. The gate is either

1.  NAND or EX-OR gate

2.  NOR or EX-NOR gate

3.  OR or EX-NOR gate

4.  AND or EX-OR gate.

4

NOR or EX-NOR gate

Explanation :
No Explanation available for this question

# The gate shown in the figure is

1.  AND gate

2.  NAND gate

3.  NOT gate

4.  OR gate.

4

NOT gate

Explanation :
No Explanation available for this question

# When signed numbers are used in Binary arithmetic, then which of the following notation would have unique representation for zero

1.  Sign-magnitude

2.  1’s complement

3.  2’s complement

4.  9’s complement.

4

2’s complement

Explanation :
No Explanation available for this question

# The logic circuit given below converts binary code Y1Y2Y3 into

1.  Excess-3code

2.  Gray code

3.  BCD code

4.  Hamming code.

4

Gray code

Explanation :
No Explanation available for this question

# The minimum Boolean expression for the given circuits is

1.  AB+AC+BC

2.  A+BC

3.  A+B

4.  A+B+C.

4

AB+AC+BC

Explanation :
No Explanation available for this question

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